NSTL国家科技图书文献中心

1. HT-NoC: Reconfigurable High Throughput Network-on-Chip for AI Dataflow Accelerators NSTL国家科技图书文献中心

Mohamed Amine Zhiri | Hana Krichene ... - 《Applied Reconfigurable Computing》 - International Symposium on Applied Reconfigurable Computing - 2025, - 15～32 - 共18页

摘要： Throughput Network-on-Chip), a reconfigurable NoC to | Network (FFN) blocks in Transformers, outperforming | for many Deep Neural Networks* (DNN) algorithms due* | Fully Connected (FC) layers are a bottleneck | to their high bandwidth requirements, which makes

关键词： Network-on-Chip | AI accelerators | Fully connected layers | Transformers

2. SMP-NoC: A Flexible and Efficient Shared Memory Protection Unit on Network-on-Chip NSTL国家科技图书文献中心

Teng Wu | Ying He ... - 《Algorithms and Architectures for Parallel Processing,Part IV》 - International Conference on Algorithms and Architectures for Parallel Processing - 2025, - 1～11 - 共11页

摘要：Network-on-Chip (NoC) is crucial for modern | supports dynamic memory region adjustments based on four | multicore systems, offering high throughput and low | latency. However, its shared memory faces threats like | illegal access and DDoS attacks. To enhance security

关键词： Network-on-Chip (NoC) | Hardware-level sandbox | Taint-track monitor | Shared memory

3. MorphBungee: A 65-nm 7.2-mm2 27-µJ/Image Digital Edge Neuromorphic Chip With on-Chip 802-Frame/s Multi-Layer Spiking Neural Network Learning NSTL国家科技图书文献中心

Tengxiao Wang | Min Tian ... - 《IEEE transactions on biomedical circuits and systems》 - 2025,19(1) - 209～225 - 共17页

摘要： neuromorphic spiking neural network* (SNN) processor chip for* | and fully on-chip* spike-timing-based multi-layer SNN* | throughput of 802 and 2270 frames/s for on-chip* learning* | rate under a 1.0V core power supply, Our on-chip | reconfigurable parallelism. A prototype chip* occupying an*

关键词： Neurons | System-on-chip | Neuromorphics | Task analysis | Computer architecture | Hardware | Costs

4. CINOC: Computing in Network-On-Chip With Tiled Many-Core Architectures for Large-Scale General Matrix Multiplications NSTL国家科技图书文献中心

Yao Qin | Mingyu Wang ... - 《IEEE transactions on circuits and systems,I.Regular papers》 - 2025,72(3) - 1256～1268 - 共13页

摘要：-design of computable network-on-chip* and the last-level* | aforementioned problems, we propose a computing in network-on | performance losses caused by limited on-chip* cache resources* | a challenge to perform LMMs efficiently on | -chip* paradigm to perform LMMs by mitigating the*

关键词： Computer architecture | Instruction sets | Memory management | Transformers | Streams | Bandwidth | Message systems | Computational efficiency | Programming | Parallel processing

5. Combining Prior Knowledge With Transfer Learning (PKID-TL) for Fast Neural Network Enabled Uncertainty Quantification of Graphene On-Chip Interconnects NSTL国家科技图书文献中心

Surila Guglani | Asha Kumari Jakhar ... - 《IEEE transactions on components,packaging,and manufacturing technology》 - 2025,15(1) - 85～93 - 共9页

摘要：) technique is developed for graphene on-chip* interconnects* | In this article, an artificial neural network | and MLGNR interconnect networks* and different* | (ANN)-enabled uncertainty quantification (UQ | . In the proposed technique, primary ANNs are trained

关键词： Training | Integrated circuit interconnections | Artificial neural networks | Uncertainty | SPICE | Conductors | Monte Carlo methods

6. On-chip human lymph node stromal network for evaluating dendritic cell and T-cell trafficking NSTL国家科技图书文献中心

Kwee, Brian J. | Mansouri, Mona ... - 《Biofabrication》 - 2025,17(1) - 共15页

摘要：-cell zone, consists of a network* of* | lymph node stromal network* from human cultured FRCs* | network,secrete the extracellular matrix proteins | . Although the engineered FRC network* did notsecrete* | thelymph node stromal network* to a greater extent than*

关键词： microphysiological systems | lymph node paracortex | fibroblastic reticular cells | dendritic cells | T-cells

7. The octagonal-cross-by-pass-mesh topology design for the on-chip-communication NSTL国家科技图书文献中心

Gulzari U.A. | Farooq W.... - 《Computer networks》 - 2025,257(Feb.) - 1.1～1.16 - 共16页

摘要： topology design for on-chip* communication. We have* | Octagonal-Cross-By-Pass-Mesh (Octa-CBP-Mesh) network | role in enhancing the capabilities of the network | weaknesses of the CBP-Mesh network, we proposed the Octa | -CBP-Mesh network* topology, which further improved*

关键词： Latency | Network | Network-on-chip | Router | Topology

8. Pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator NSTL国家科技图书文献中心

Wenyao Zhu | Yizhi Chen ... - 《Embedded Computer Systems: Architectures,Modeling,and Simulation,Part II》 - International Conference on Embedded Computer Systems - 2025, - 109～118 - 共10页

摘要： convolutional neural networks* (CNNs), Network-on-chip (NoC* | optimization approaches focus on computational-heavy layers | explore the acceleration of pooling layers by in-network | processing. We propose a pooling on-the-go method to do the | data movements. We demonstrate our method on a cycle

关键词： CNN accelerator | In-network processing | Network-on-Chip | Pooling

9. Travel Time-Based Task Mapping for NoC-Based DNN Accelerator NSTL国家科技图书文献中心

Yizhi Chen | Wenyao Zhu ... - 《Embedded Computer Systems: Architectures,Modeling,and Simulation,Part I》 - International Conference on Embedded Computer Systems - 2025, - 76～92 - 共17页

摘要：Network-on-Chip (NoC) based architectures are | recently proposed to accelerate deep neural networks* in* | specialized hardware. Given that the hardware configuration | is fixed post-manufacture, proper task mapping | attracts researchers' interest. We propose a travel time

关键词： Task mapping | DNN accelerator | Network-on-Chip

10. A microring resonator full-duplex 5 x 5 optical routing switch based on ITO material NSTL国家科技图书文献中心

Shi, Yunying | Tang, Peng ... - 《Optical review》 - 2025,32(1) - 14～21 - 共8页

摘要： promising solution for on-chip* multi-core interconnection* | interconnection. To improve the performance of on-chip* optical* | interconnection network* architecture, a novel 5 x 5 full-duplex* | communication optical routing switch based on microring is | activating material indium-tin oxide on the traditional

摘要： Throughput Network-on-Chip), a reconfigurable NoC to | Network (FFN) blocks in Transformers, outperforming | for many Deep Neural Networks* (DNN) algorithms due* | Fully Connected (FC) layers are a bottleneck | to their high bandwidth requirements, which makes

关键词： Network-on-Chip | AI accelerators | Fully connected layers | Transformers

摘要：Network-on-Chip (NoC) is crucial for modern | supports dynamic memory region adjustments based on four | multicore systems, offering high throughput and low | latency. However, its shared memory faces threats like | illegal access and DDoS attacks. To enhance security

关键词： Network-on-Chip (NoC) | Hardware-level sandbox | Taint-track monitor | Shared memory

关键词： Neurons | System-on-chip | Neuromorphics | Task analysis | Computer architecture | Hardware | Costs

摘要：-design of computable network-on-chip* and the last-level* | aforementioned problems, we propose a computing in network-on | performance losses caused by limited on-chip* cache resources* | a challenge to perform LMMs efficiently on | -chip* paradigm to perform LMMs by mitigating the*

关键词： Computer architecture | Instruction sets | Memory management | Transformers | Streams | Bandwidth | Message systems | Computational efficiency | Programming | Parallel processing

摘要：) technique is developed for graphene on-chip* interconnects* | In this article, an artificial neural network | and MLGNR interconnect networks* and different* | (ANN)-enabled uncertainty quantification (UQ | . In the proposed technique, primary ANNs are trained

关键词： Training | Integrated circuit interconnections | Artificial neural networks | Uncertainty | SPICE | Conductors | Monte Carlo methods

摘要：-cell zone, consists of a network* of* | lymph node stromal network* from human cultured FRCs* | network,secrete the extracellular matrix proteins | . Although the engineered FRC network* did notsecrete* | thelymph node stromal network* to a greater extent than*

关键词： microphysiological systems | lymph node paracortex | fibroblastic reticular cells | dendritic cells | T-cells

摘要： topology design for on-chip* communication. We have* | Octagonal-Cross-By-Pass-Mesh (Octa-CBP-Mesh) network | role in enhancing the capabilities of the network | weaknesses of the CBP-Mesh network, we proposed the Octa | -CBP-Mesh network* topology, which further improved*

关键词： Latency | Network | Network-on-chip | Router | Topology

关键词： CNN accelerator | In-network processing | Network-on-Chip | Pooling

摘要：Network-on-Chip (NoC) based architectures are | recently proposed to accelerate deep neural networks* in* | specialized hardware. Given that the hardware configuration | is fixed post-manufacture, proper task mapping | attracts researchers' interest. We propose a travel time

关键词： Task mapping | DNN accelerator | Network-on-Chip

关键词： Photonic network-on-chip | Optical router | Microring resonator | Full duplex

4008-161-200 800-990-8900

国家科技图书文献中心

摘要： Throughput Network-on-Chip), a reconfigurable NoC to | Network (FFN) blocks in Transformers, outperforming | for many Deep Neural Networks (DNN) algorithms due | Fully Connected (FC) layers are a bottleneck | to their high bandwidth requirements, which makes

关键词： Network-on-Chip | AI accelerators | Fully connected layers | Transformers

摘要：Network-on-Chip (NoC) is crucial for modern | supports dynamic memory region adjustments based on four | multicore systems, offering high throughput and low | latency. However, its shared memory faces threats like | illegal access and DDoS attacks. To enhance security

关键词： Network-on-Chip (NoC) | Hardware-level sandbox | Taint-track monitor | Shared memory

摘要： neuromorphic spiking neural network (SNN) processor chip for | and fully on-chip spike-timing-based multi-layer SNN | throughput of 802 and 2270 frames/s for on-chip learning | rate under a 1.0V core power supply, Our on-chip | reconfigurable parallelism. A prototype chip occupying an

关键词： Neurons | System-on-chip | Neuromorphics | Task analysis | Computer architecture | Hardware | Costs

摘要：-design of computable network-on-chip and the last-level | aforementioned problems, we propose a computing in network-on | performance losses caused by limited on-chip cache resources | a challenge to perform LMMs efficiently on | -chip paradigm to perform LMMs by mitigating the

关键词： Computer architecture | Instruction sets | Memory management | Transformers | Streams | Bandwidth | Message systems | Computational efficiency | Programming | Parallel processing

摘要：) technique is developed for graphene on-chip interconnects | In this article, an artificial neural network | and MLGNR interconnect networks and different | (ANN)-enabled uncertainty quantification (UQ | . In the proposed technique, primary ANNs are trained

关键词： Training | Integrated circuit interconnections | Artificial neural networks | Uncertainty | SPICE | Conductors | Monte Carlo methods

摘要：-cell zone, consists of a network of | lymph node stromal network from human cultured FRCs | network,secrete the extracellular matrix proteins | . Although the engineered FRC network did notsecrete | thelymph node stromal network to a greater extent than

关键词： microphysiological systems | lymph node paracortex | fibroblastic reticular cells | dendritic cells | T-cells

摘要： topology design for on-chip communication. We have | Octagonal-Cross-By-Pass-Mesh (Octa-CBP-Mesh) network | role in enhancing the capabilities of the network | weaknesses of the CBP-Mesh network, we proposed the Octa | -CBP-Mesh network topology, which further improved

关键词： Latency | Network | Network-on-chip | Router | Topology

关键词： CNN accelerator | In-network processing | Network-on-Chip | Pooling

摘要：Network-on-Chip (NoC) based architectures are | recently proposed to accelerate deep neural networks in | specialized hardware. Given that the hardware configuration | is fixed post-manufacture, proper task mapping | attracts researchers' interest. We propose a travel time

关键词： Task mapping | DNN accelerator | Network-on-Chip

关键词： Photonic network-on-chip | Optical router | Microring resonator | Full duplex

4008-161-200 800-990-8900

国家科技图书文献中心

摘要： Throughput Network-on-Chip), a reconfigurable NoC to | Network (FFN) blocks in Transformers, outperforming | for many Deep Neural Networks* (DNN) algorithms due* | Fully Connected (FC) layers are a bottleneck | to their high bandwidth requirements, which makes

摘要：-design of computable network-on-chip* and the last-level* | aforementioned problems, we propose a computing in network-on | performance losses caused by limited on-chip* cache resources* | a challenge to perform LMMs efficiently on | -chip* paradigm to perform LMMs by mitigating the*

摘要：) technique is developed for graphene on-chip* interconnects* | In this article, an artificial neural network | and MLGNR interconnect networks* and different* | (ANN)-enabled uncertainty quantification (UQ | . In the proposed technique, primary ANNs are trained

摘要：-cell zone, consists of a network* of* | lymph node stromal network* from human cultured FRCs* | network,secrete the extracellular matrix proteins | . Although the engineered FRC network* did notsecrete* | thelymph node stromal network* to a greater extent than*

摘要： topology design for on-chip* communication. We have* | Octagonal-Cross-By-Pass-Mesh (Octa-CBP-Mesh) network | role in enhancing the capabilities of the network | weaknesses of the CBP-Mesh network, we proposed the Octa | -CBP-Mesh network* topology, which further improved*

摘要：Network-on-Chip (NoC) based architectures are | recently proposed to accelerate deep neural networks* in* | specialized hardware. Given that the hardware configuration | is fixed post-manufacture, proper task mapping | attracts researchers' interest. We propose a travel time